Write OperationsĪ write operation requires two 8-bit data word addresses following the device address word and acknowledgment. If a compare is not made, the device will return to standby state. Upon a compare of the device address, the EEPROM will output a zero. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low. The eighth bit of the device address is the read/write operation select bit. The A2, A1, and A0 pins use an internal proprietary circuit that biases them to a logic low condition if the pins are allowed to float. These bits must compare to their corresponding hardwired input pins. The 64K uses the three device address bits A2, A1, A0 to allow as many as eight devices on the same bus. This is common to all 2-wire EEPROM devices. The device address word consists of a mandatory one, zero sequence (1010) for the first four most significant bits as shown. The 64K EEPROM requires an 8-bit device address word following a start condition to enable the chip for a read or write operation. 32-Byte Page Write Mode (Partial Page Writes Allowed).
Write Protect Pin for Hardware Data Protection.Schmitt Trigger, Filtered Inputs for Noise Suppression.Low-Power Devices (ISB = 2 ♚ 5.5V) Available.Low-Voltage and Standard-Voltage Operation.If left unconnected, WP is internally pulled down to GND. When WP is tied high to VCC, all write operations to the upper quadrant (8/16K bits) of memory are inhibited. WRITE PROTECT (WP): The write protect input, when tied to GND, allows normal write operations. When the pins are not hardwired, the default A2, A1, and A0 are zero. When the pins are hardwired, as many as eight 32K/64K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section).
This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collector devices.ĭEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1, and A0 pins are device address inputs that are hard-wired or left not connected for hardware compatibility with AT24C16.
#Ccs adding the wire library to project serial
SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The device’s cascadable feature allows up to 8 devices to share a common 2-wire (I2C) bus. The 24C64 provides 65,536 bits (8kB) of serial electrically erasable and programmable read-only memory (EEPROM) organized as 8192 words of 8 bits each. Digital Storage Oscilloscope (DSO): Siglent SDS1104 (on ).Component Name Buy On 1 PIC16F877A or PIC18F2550 or any other Add 1 BreadBoard Add 8 LED Add Add 1 Resistors Kit Add Add 1 Capacitors Kit Add Add 1 Jumper Wires Pack Add Add 1 LM7805 Voltage Regulator (5v) Add 1 Crystal Oscillator Add 1 PICkit2 or 3 Programmer Add 1 9v Battery or DC Power Supply Add Add Add